PCA9541 device highlight

The PCA9541 is designed for dual-master, high-reliability I2C applications where continuous maintenance and control monitoring is required even if one master fails or its controller card is removed for maintenance. It can also be used in other applications such as where masters share the same resource but cannot share the same bus or as a gatekeeper multiplexer in long single bus applications or as a bus initialization/recovery device.

Two versions of the PCA9541 are offered, each slightly different than the other with both versions offered in SO (D), TSSOP (PW), and HVQFN (BS) packages.

Pkg	Pack	PCA9541/01	PCA9541/03
SO	Tube	PCA9541D/01	PCA9541D/03
	T & R	PCA9541D/01-T	PCA9541D/03-T
TSSOP	Tube	PCA9541PW/01	PCA9541PW/03
	T & R	PCA9541PW/01-T	PCA9541PW/03-T
HVQFN	T & R	PCA9541BS/01-T	PCA9541BS/03-T

The PCA9541/01 version defaults to channel 0 selected after power up. This is the most common device to use for server applications and requires no set up to start communicating with the downstream devices. The backup master takes control of the downstream devices should the primary master fail.

The PCA9541/03 version defaults to no channels selected at power up. This is the general purpose version, and either of the masters can command the switch to connect themselves to the downstream slave devices. This version is very useful as a gatekeeper multiplexer, allowing a common I2C bus to be multiplexed to devices with the same address located on different cards.

Note: The PCA9541/02 version has been discontinued.

In a typical multi-point application, the two masters (e.g., primary and back-up) are located on separate I2C buses that connect to multiple downstream I2C bus slave cards/devices via a PCA9541/01 to provide high reliability of the I2C bus. This way, if a master fails or the master card is removed for repair or service, the back-up master can take over and provide 24/7 control of the slave cards. Having two I2C busses prevents losing control if an SDA/SCL pin is bent during card insertion or if a circuit board SDA/SCL trace breaks.

In the figure above, I2C commands are sent via the primary or back-up master (Master0 or Master1, respectively). Either master can take command of the I2C bus and, at any time, can gain control of the slave devices if the other master is unable to communicate. The failed master is isolated from the system and will not affect communication between the active master and the slave devices located on the cards.

For even higher reliability in multi-point backplane applications, two dedicated masters can be used for every card as shown in the figure below. This architecture, however, should rarely be needed.

Some masters may not be multi-master capable or some masters may not work well together and continually lock up the bus. The PCA9541 can be used to separate the masters but still allow shared access to slave devices such as Field Replaceable Unit (FRU) EEPROMs or temperature sensors.

If the /01 version is used in the figure above, at power up:

• Master A will control Slave A0 and Master B will control Slave B0
• Main Master will be disconnected from both Assembly A and B

If the /01 version is used in the figure above, at power up:

• Master 0 will control Slave 1 and Slave 2 (but not Slave 3)
• Master 1 will be disconnected from the entire system
• Master 2 will control Slave 3

The PCA9541/03 can act as a gatekeeper multiplexer in applications where there are multiple I2C devices with the same fixed address (e.g., EEPROMs with an address of "Z" as shown in the figure below) connected in a multi-point arrangement to the same I2C bus. Up to 16 hot swappable cards/devices can be multiplexed to the same bus master by using one PCA9541/03 per card/device. Since each PCA9541/03 has its own unique address (e.g., "A", "B", "C", etc.), the EEPROMs can be connected to the master, one at a time, by connecting one PCA9541/03 (Master 0 position) while keeping the rest of the cards/devices isolated (off position).

An alternative, shown in the figure below, is to use a PCA9548 1-to-8 channel switch on the master card and run 8 I2C buses, one to each EEPROM card to multiplex the master to each card. The number of card pins used is the same in either case, but there are 7 less pairs of SDA/SCL traces on the circuit board if the PCA9541/03 were to be used.

If the I2C bus is hung, I2C devices without a hardware reset pin (e.g., Slave 1 and Slave 2 in the diagram below) can be isolated from the master by the PCA9541/03. The PCA9541/03 disconnects the downstream bus when it is reset via the hardware reset line, restoring the master's control of the upstream bus (e.g., Slave 0). The bus master can then command the PCA9541/03 to send 9 clock pulses/stop condition to reset the downstream I2C devices before they are reconnected to the master.

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	PCA9541		2-to-1 I2C Master Selector with Interrupt Logic and Reset
	Datasheet (Sep 11, 2008) PCA9541D/01 SO-16 Production SOT109-1 Pb-Free MSL=1 PCA9541PW/01 TSSOP-16 Production SOT403-1 Pb-Free          PCA9541BS/01 HVQFN-16 Production SOT629-1 Pb-Free          PCA9541D/02 SO-16 Discontinued SOT109-1 Pb-Free MSL=1 PCA9541PW/02 TSSOP-16 Discontinued SOT403-1 Pb-Free          PCA9541BS/02 HVQFN-16 Discontinued SOT629-1 Pb-Free          PCA9541D/03 SO-16 Production SOT109-1 Pb-Free MSL=1 PCA9541PW/03 TSSOP-16 Production SOT403-1 Pb-Free          PCA9541BS/03 HVQFN-16 Production SOT629-1 Pb-Free          Device Family Functions Literature Models Support Docs Price Buy Online More...